Vol. 2 No.1
Year: 2013
Issue:
Feb-Apr
Title : Design
of High speed Modified Booth Encoded Parallel Multiplier
Author
Name : C.Padma, yarraballi
mahesh
Synopsis :
This paper presents
the design and implementation of signed-unsigned Modified Booth Encoding
multiplier. Thus, the requirement of the modern computer system is a dedicated
and very high speed multiplier unit that can perform multiplication operation
on signed as well as unsigned numbers. The conventional Modified Booth Encoding
(MBE) generates an irregular partial product array because of the extra partial
product bit at the least significant bit position of each partial product row.
The modified Booth Encoder circuit generates half the partial products in
parallel. By extending sign bit of the operands and generating an additional
partial product. The Carry Save Adder (CSA) tree and the final Carry Look Ahead
(CLA) adder used to speed up the multiplier operation. The resultant multiplier
shows best performance than others. Since the proposed multiplier operates at
GHz ranges.
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