An FPGA based architecture for Convolution Filtering using MATLAB and HDL Coding Technique

Vol.2  No.3

Year : 2013

Issue : Aug-Oct

Title : An FPGA based architecture for Convolution Filtering using MATLAB and HDL Coding Technique

Author Name : Pradeep kumar S, Ashwini Kumari P

Synopsis :

The Design part in Very Large Scale Integration is an extremely complex task. It is continually stress the fact that the field is inherently multidisciplinary in nature. By keeping Integrated circuit as a reference, the field programmable gate array (FPGA) technology has become an advanced target for the implementation of real time algorithms suited to video image processing applications. The unique architecture of the FPGA has allowed the technology to be used in many applications encompassing all aspects of video image processing.The algorithm like linear filtering based on a two dimensional convolution, and non-linear two dimensional rank order filters, thresholding, Sobel edge detection etc., represent a basic set of image operations for a number of applications. In this paper, an implementation of linear image filtering using a FPGA Xilinx 13.1 Version, vertex-4 is presented. The FPGA-based system is accessed through a Matlab graphical user interface and Xilinx, which handles the communication setup. A HDL language is used for coding purpose. The results obtained from MATLAB simulations and the described FPGA-based implementation is presented.

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